There are several different types of memory devices and/or systems used in caches for computing environments, each having its own advantages and disadvantages. A static random access memory (SRAM)-based cache is commonly used in applications where access speed and low power are considerations. Magnetoresistive random access memory (MRAM) is commonly used in applications where high bit cell density is advantageous. For example, a magnetoresistive random access memory (MRAM)-based cache can provided approximately four times larger capacity than static random access memory (SRAM)-based cache. However, a magnetoresistive random access memory (MRAM)-based cache tends to be slower than static random access memory (SRAM)-based cache.
It has been proposed to implement the tradeoff between magnetoresistive random access memory (MRAM)-based caches and static random access memory (SRAM)-based caches in hybrid cache architecture. The proposed hybrid cache architecture would include both static random access memory (SRAM)-based and magnetoresistive random access memory (MRAM)-based cache regions. However, this approach is difficult to implement because static random access memory (SRAM) bit cells and magnetoresistive random access memory (MRAM) bit cells are different sizes.
Thus, improved apparatuses and methods for implementing hybrid cache architectures are needed.